In the summer of 2023 I went to Denmark to do research at DTU — the Technical University of Denmark, on the Lyngby campus outside Copenhagen. Every morning I'd hop on the bus — Denmark has excellent public transit — ride out to campus, and walk into a world I'd only read about: a cleanroom where you fabricate photonic circuits at the nanometer scale. I took two classes. The first was an optical waveguide fabrication course in June under Haiyan Ou, an associate professor at DTU Electro (DTU Fotonik) who became my introduction to photonics in a lab setting — that class included nanoscale fabrication in the cleanroom. The second, in July, was a hyperspectral computer vision course where I learned how to properly do signal processing and understanding on hyperspectral data, using shearlets. On top of the coursework, I led a team building a GAN for image super-resolution and relighting. Two months, two classes, and a cleanroom education I'd been hungry for.
Haiyan Ou and the Wide Bandgap Semiconductor Photonics group
Haiyan Ou leads the Wide Bandgap Semiconductor Photonics group at DTU's Department of Electrical and Photonics Engineering. She got her PhD in 2000 from the Institute of Semiconductors at the Chinese Academy of Sciences and has been an associate professor at DTU since 2005 — over twenty years working on integrated optics. Her research sits at the intersection of silicon carbide (SiC) photonics, nonlinear optics, and nanofabrication: building blocks for photonic integrated circuits, arrayed waveguide gratings, ring resonators, and optical frequency combs. She's published over 130 papers with an h-index of 30, holds three patents, and has led major projects like LEDSiC (a new type of white LED using fluorescent silicon carbide, funded by Innovation Fund Denmark) and NORLED (the Nordic Light-Emitting Diode Initiative, which produced over 30 papers and opened an entirely new field of fluorescent SiC for general lighting). More recently she leads the SiC-Q-PIC project — integrating color centers into high-Q optical cavities in silicon-carbide-on-insulator stacks for room-temperature single-photon sources at telecom wavelengths — and the SiComb project on on-chip optical frequency combs. Her 2022 work on nonlinear photonics in silicon carbide (four-wave mixing, supercontinuum generation) won the Photonics Research Editor-in-Chief Choice Award.
What made her a great teacher was the combination of deep theoretical grounding and hands-on cleanroom experience. She didn't just lecture about waveguide physics — she walked us through every fabrication step, explained the why behind each parameter choice, and let us get our hands on real equipment from day one. She was the person who made photonics concrete for me: not just equations in a textbook, but light confined in a structure you'd designed and built with your own hands.
The cleanroom: DTU Nanolab
The fabrication took place at DTU Nanolab (formerly DTU Danchip), a world-class nanofabrication facility on the Lyngby campus. You suit up in a full bunny suit — gown, hood, gloves, booties — go through the airlock, and step into a yellow-lit cleanroom where the air is filtered to ISO 4 standards. Contamination at the nanometer scale is the enemy, so everything is controlled: temperature, humidity, particulate count. The facility has electron-beam lithography (JEOL JBX-9500, 10 nm resolution), PECVD chambers, reactive ion etchers, ellipsometers, profilometers, SEMs — the full stack for going from a design on a screen to a physical photonic device.
Our process flow for the silicon-on-insulator (SOI) waveguides followed the standard integrated-optics pipeline. Start with a SOI wafer, dice it into 1″ chips. Spin-coat e-beam resist (CZAR, 200 nm, 6000 RPM for 60 seconds, softbake at 180 °C). Expose with the e-beam writer — the dose needs a test run because even small variations matter at this scale. Develop in AR 600-546 for 60 seconds, rinse in IPA, blow dry with N₂, then inspect under the optical microscope for contaminants or poor development. Etch with the Pegasus 3 (deep reactive ion etching, 75 seconds, getting about 244 nm depth at ~3.25 nm/s). Strip the resist with AR 600-71, measure the step height on the DektakXTA profilometer (target: 200 ± 5 nm). Finally, deposit a SiO₂ top cladding by PECVD (~4.8 μm, 30 minutes, refractive index matched to the buffer) and measure thickness with the ellipsometer. At every step, something can go wrong — spin uniformity, dose exposure, etch rate , cladding stoichiometry — and that's what makes it real engineering rather than a textbook exercise.
Designing my own waveguide: ring resonators and photonic logic
The part that excited me most was designing my own chip. I used L-edit (Tanner EDA) to lay out a waveguide structure with ring resonators — the first building blocks of a photonic logic gate. A ring resonator is a closed-loop waveguide coupled to a straight bus waveguide; at specific wavelengths (the resonance condition), light couples into the ring and constructive creates a sharp spectral dip in transmission. By cascading rings with different radii or coupling gaps, you can build wavelength filters, switches, and eventually logic elements that operate on light instead of electrons. That's the long game: photonic circuits that sidestep the heat and bandwidth bottlenecks of classical electronics.
I went a bit beyond the assignment. In L-edit, I embedded text into the chip layout alongside the waveguide structures: “The Universe Appears To Be A Self Exciting Circuit,” “How strange this Technological Singularity,” “As Humanity Transcends Itself,” “From Big Bang to Nanorobots,” “Let There Be Light” — and a :3 smiley face. The idea of writing philosophical musings about the nature of computation and civilization directly into the geometry of a photonic circuit felt right; light would literally pass through structures that said something about why we're building them. We ended up using a previous year's mask for the actual etch because our designs needed to be nanometer-exact at the optical couplers to avoid massive loss, and some of our layouts had flaws that would have made them non-functional. But I learned as much from the failed design as from the successful fabrication — the tolerances in photonics are brutal, and understanding why a coupler doesn't work teaches you more about mode confinement than getting it right on the first try.
Characterization: measuring what we built
Once the waveguides and ring resonators were fabricated, we characterized them. We aligned input and output fibers to the optical couplers on the chip using precision stages, swept a tunable laser source across the 1520–1620 nm telecom band, and recorded the transmission spectra on an optical spectrum analyzer. For the straight waveguides, we measured at 3 mm and 8 mm lengths — the 3 mm guide showed best-case insertion loss around 38 dB/cm and worst polarization at 50 dB/cm; the 8 mm guide was 50–55 dB/cm. Those numbers are high (commercial waveguides aim for <1 dB/cm), which tells you something about what student-fabricated devices look like versus production — but the point was understanding the pipeline end-to-end, not shipping a product.
The ring resonators were more interesting. We measured single-ring and double-ring devices, sweeping narrow bands around 1570 nm. The single ring showed a clean dip — sharp enough to extract the free spectral range, extinction ratio, and full-width at half-maximum, from which you can calculate propagation loss. The double rings showed interlocking resonance patterns: one dip from each ring, with a Vernier-like interaction when the FSRs differ. We could see regularly interspersed resonance intervals in the broader sweeps, confirming the rings were functioning as effective resonators. We studied the cutback technique for deriving propagation loss separately from coupling loss — a destructive method where you progressively shorten the fiber and compare power, which isolates the waveguide's intrinsic loss from the connector and coupling contributions.
Simulation and software
The design work used Ansys Lumerical for mode solving and coupling simulations — calculating the effective index, group index, and mode profile of SOI waveguides (430×250 nm cross-section, silicon core on SiO₂ substrate at 1.55 μm), and simulating coupling efficiency between the bus waveguide and ring, and between waveguide facets and standard single-mode fiber (Corning SMF-28). My laptop had issues throughout the project and eventually died, which meant I lost access to some of the simulation files and couldn't finish every exercise. Frustrating at the time, but it was also an honest glimpse at what research actually looks like: equipment fails, data gets lost, you adapt. One thing Lumerical did give me was a clear sense of where photonic design software could be much better — the interface felt dated, the workflows were clunky, and I came away inspired to think about what higher-quality simulation tools could look like for the next generation of photonic designers.
What the physics taught me
Before DTU, I understood photonics conceptually from self-study — waveguide modes, effective index, coupling, resonance. Haiyan Ou and the cleanroom made it physical. When you spin-coat resist and watch the thickness change with RPM on the ellipsometer, you feel the relationship between process parameters and device geometry. When you align a fiber to a waveguide facet and see the transmission spectrum snap into focus on the OSA, the theory becomes tangible. I learned how the all-pass ring resonator transfer function works — the self-coupling coefficient, cross-coupling, single-pass amplitude and phase — and derived the relationship between input and output electric fields step by step. I learned why photonics matters for the future of computing: optical interconnects bypass the heat constraints and RC delays that limit electronic scaling, offer lower latency for sensor integration, and open a path toward continuing the spirit of Moore's Law through integration density in a different physical domain. The report I wrote was titled “On The Design, Fabrication, and Characterization of Optical Planar Waveguides: Applied Nanotechnology in the 21st Century” — grandiose for a summer course, but I meant it.
Hyperspectral computer vision
The second class was hyperspectral computer vision — learning how to properly do signal processing and analysis on hyperspectral data. Hyperspectral imaging captures tens to hundreds of spectral bands per pixel, far beyond what RGB gives you; the challenge is extracting meaningful structure from that volume without losing spatial detail. The course taught shearlets as the mathematical framework — multiscale geometric representations that capture directional features more effectively than wavelets alone. Shearlets give you sparse, anisotropic decompositions well-suited for edge and texture recovery in high-dimensional spectral data. The class was where I built a proper intuition for how signal processing works on data that lives in many more dimensions than you can see.
GAN for low-light enhancement and super-resolution
Alongside the two classes, I led a team of four (myself, Joseph Wang, Ruijie Wang, and James Au) on a machine learning project for the Computational Imaging and Spectroscopy program: a two-stage GAN pipeline that takes dark, images, relights them to appear properly illuminated, and then super-resolves them to recover detail. We wrote it up as a paper: “Low Light Level Image Enhancement With Generative Adversarial Networks.”
The architecture was two GANs in series. GAN #1 handled low-light enhancement: a U-Net generator (encoder–bridge–decoder with skip connections to preserve fine-grained detail) learned to map from poorly lit images to well-lit ones, trained against a CNN discriminator (five convolutional layers, LeakyReLU, Sigmoid output). We trained on the LOL dataset — 500 paired low-light / well-lit images at 600×400. The loss combined MAE (pixel-wise fidelity) and BCE (adversarial signal), weighted by β = 0.01, optimized with Adam at lr = 0.0001. GAN #2 was a Conditional Deep Convolutional GAN (CDCGAN) for super-resolution: it took the well-lit outputs from GAN #1 and learned the mapping from 625×625 to 2500×2500 using a separate 850-pair dataset.
My role was designing the overall architecture of the LLE GAN, getting it to work with full 3-channel RGB synthesis (an earlier attempt converted to YCbCr and trained on the Y channel only, which lost color information), iterating on the generator and discriminator components, writing the inference code that chained both models for a single pass, and keeping the team moving under tight time and compute constraints. The low-light enhancement worked well — the generator loss converged, outputs were visibly brighter and more legible, and PSNR stayed consistently high. The super-resolution stage was harder: the CDCGAN couldn't fully converge in the time we had, and the generated high-res images didn't rival the ground truth. We noted in the paper that an ESRGAN (Enhanced Super-Resolution GAN) with Residual-in-Residual Dense Blocks would likely do better, and that future foundation models would probably handle both tasks without task-specific training. The FID score of 367 told us there was real room to improve — but for a summer project with limited GPU time, getting a working two-stage pipeline from dark-and-noisy to bright-and-sharp was the point.
What I took away
Denmark was formative in a way that's hard to compress. The photonics thread connects to everything I care about: computing beyond classical electronics, the physical substrates of information processing, building things at scales where quantum effects matter. Haiyan Ou showed me what two decades of focused expertise in a single domain looks like — and why that depth matters when you're trying to push a field forward. The cleanroom taught me to respect fabrication tolerances and process control in a way no simulation can. And the hyperspectral vision class reminded me that the problems I find most interesting live at the boundary between the physical world and computational representation — whether that's light in a waveguide or spectral data in a neural network. The phrase I etched into my chip layout — “Let There Be Light” — was a joke and a statement of intent at the same time.